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» A Transactional Architecture for Simulation
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FDL
2006
IEEE
14 years 3 months ago
Formalizing TLM with Communicating State Machines
Transaction Level Models are widely being used as high-level reference models during embedded systems development. High simulation speed and great modeling flexibility are the ma...
Bernhard Niemann, Christian Haubelt
DEXAW
2002
IEEE
127views Database» more  DEXAW 2002»
14 years 2 months ago
Enhanced Multi-Version Data Broadcast Schemes for Time-Constrained Mobile Computing Systems
In this paper, we study the data dissemination problem in time-constrained mobile computing systems (TCMCS) in which maximizing data currency (minimizing staleness) and meeting tr...
Hei-Wing Leung, Joe Chun-Hung Yuen, Kam-yiu Lam, E...
WSC
2008
13 years 11 months ago
A plug-in-based architecture for random number generation in simulation systems
Simulations often depend heavily on random numbers, yet the impact of random number generators is recognized seldom. The generation of random numbers for simulations is not trivia...
Roland Ewald, Johannes Rossel, Jan Himmelspach, Ad...
ASPDAC
2005
ACM
79views Hardware» more  ASPDAC 2005»
13 years 11 months ago
Simulation acceleration of transaction-level models for SoC with RTL sub-blocks
Abstract— This paper presents an optimized channel usage between simulator and accelerator when the simulator models transaction-level SoC while accelerator models RTL sub-blocks...
Jae-Gon Lee, Woo-Seung Yang, Young-Su Kwon, Young-...
DAC
1996
ACM
14 years 1 months ago
Symphony: A Simulation Backplane for Parallel Mixed-Mode Co-Simulation of VLSI Systems
In this paper we present an integrated simulation paradigm in which parallel mixed-mode co-simulation is accomplished by integrating sequential simulators in a software simulation ...
Antonio R. W. Todesco, Teresa H. Y. Meng