228 search results - page 4 / 46 » A bipartition-codec architecture to reduce power in pipeline... |
ISCA
2003
IEEE
14 years 22 days ago
2003
IEEE
Scaling of CMOS technology causes the power supply voltages to fall and supply currents to rise at the same time as operating speeds are increasing. Falling supply voltages cause ...
ISLPED
2005
ACM
14 years 1 months ago
2005
ACM
This paper explores the power implications of replacing global chip wires with an on-chip network. We optimize network links by varying repeater spacing, link pipelining, and volt...
ISLPED
2007
ACM
13 years 9 months ago
2007
ACM
Throughput servers using simultaneous multithreaded (SMT) processors are becoming an important paradigm with products such as Sun's Niagara and IBM Power5. Unfortunately, thr...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Asynchronous circuits are increasingly attractive as low power or high-performance replacements to synchronous designs. A key part of these circuits are asynchronous micropipeline...
SBCCI
2003
ACM
14 years 21 days ago
2003
ACM
– We present a new architecture for signed multiplication which maintains the pure form of an array multiplier, exhibiting a much lower overhead than the Booth architecture. This...