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» A cis-regulatory logic simulator
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ISLPED
1996
ACM
78views Hardware» more  ISLPED 1996»
14 years 24 days ago
Gate-level current waveform simulation of CMOS integrated circuits
We present a new gate-level approach to current simulation. We use a symbolic model of current pulses that takes accurately into account the dependence on the switching conditions...
Alessandro Bogliolo, Luca Benini, Giovanni De Mich...
WSC
2004
13 years 10 months ago
Ontologies for Modeling and Simulation: Issues and Approaches
Ontologies represent the next important phase of the World Wide Web, creating a semantic web which links together disparate pieces of information and knowledge. Creating ontologie...
Paul A. Fishwick, John A. Miller
ICCAD
2003
IEEE
204views Hardware» more  ICCAD 2003»
14 years 5 months ago
Modeling of Ballistic Carbon Nanotube Field Effect Transistors for Efficient Circuit Simulation
Carbon Nanotube Field-Effect Transistors (CNFETs) are being extensively studied as possible successors to CMOS. Novel device structures have been fabricated and device simulators ...
Arijit Raychowdhury, Saibal Mukhopadhyay, Kaushik ...
ICCAD
1991
IEEE
100views Hardware» more  ICCAD 1991»
14 years 4 days ago
Extraction of Gate Level Models from Transistor Circuits by Four-Valued Symbolic Analysis
The program TRANALYZE generates a gate-level representation of an MOS transistor circuit. The resulting model contains only four-valued unit and zero delay logic primitives, suita...
Randal E. Bryant
WSC
1998
13 years 10 months ago
Input Modeling Tools for Complex Problems
A simulation model is composed of inputs and logic; the inputs represent the uncertainty or randomness in the system, while the logic determines how the system reacts to the uncer...
Barry L. Nelson, Michael Yamnitsky