40 search results - page 3 / 8 » A combined feasibility and performance macromodel for analog... |
GECCO
2003
Springer
14 years 22 days ago
2003
Springer
Continuous Time Recurrent Neural Networks (CTRNNs) have previously been proposed as an enabling paradigm for evolving analog electrical circuits to serve as controllers for physica...
VLSID
2002
IEEE
14 years 8 months ago
2002
IEEE
Our target is automation of analog circuit's layout, which is a bottleneck in mixed-signal's design. We formulate the layout explicitly considering manufacturing process...
ICCD
2007
IEEE
14 years 1 months ago
2007
IEEE
A methodology for constructing circuit-level mismatch models and performing yield optimization is presented for CMOS analog circuits. The methodology combines statistical techniqu...
ICCAD
1998
IEEE
13 years 11 months ago
1998
IEEE
This paper presents an efficient statistical design methodology that allows simultaneous sizing for performance and optimization for yield and robustness of analog circuits. The s...
DAC
2007
ACM
13 years 11 months ago
2007
ACM
This paper presents MOJITO, a system which optimizes across thousands of analog circuit topologies simultaneously, and returns a set of sized topologies that collectively provide ...