802 search results - page 1 / 161 » A comparative study of power efficient SRAM designs |
GLVLSI
2000
IEEE
13 years 11 months ago
2000
IEEE
ETS
2010
IEEE
13 years 5 months ago
2010
IEEE
ÑIn this paper, we present a comparative study on the effects of resistive-bridging defects in the SRAM core-cells, considering different technology nodes. In particular, we analy...
ISLPED
2010
ACM
13 years 7 months ago
2010
ACM
The on-chip memory is a dominant source of power and energy consumption in modern and future processors. This paper explores the use of a new emerging non-volatile memory technolo...
ISQED
2008
IEEE
14 years 1 months ago
2008
IEEE
We present an error-tolerant SRAM design optimized for ultra-low standby power. Using SRAM cell optimization techniques, the maximum data retention voltage (DRV) of a 90nm 26kb SR...
ICCAD
2010
IEEE
13 years 4 months ago
2010
IEEE
Coarse-grain multi-threshold CMOS (MTCMOS) is an effective power-gating technique to reduce IC's leakage power consumption by turning off idle devices with MTCMOS power switc...