802 search results - page 90 / 161 » A comparative study of power efficient SRAM designs |
ISCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
– Increasing logic densities and clock frequencies on FPGAs lead to rapid increase in power density, which translates to higher on-chip temperature. In this paper, we investigate...
DAC
2008
ACM
14 years 8 months ago
2008
ACM
An energy optimization is proposed that addresses the nontrivial digital contribution to power and impact on performance in high-speed mixed-signal circuits. Parallel energy and b...
FCCM
2007
IEEE
14 years 2 months ago
2007
IEEE
Programming efficiency of heterogeneous concurrent systems is limited by the use of lock-based synchronization mechanisms. Transactional memories can greatly improve the programmi...
DAC
2008
ACM
14 years 8 months ago
2008
ACM
Modern CMOS manufacturing processes have significant variability, which necessitates guard banding to achieve reasonable yield. We study an FPGA architecture with a dual voltage s...
FPL
2008
Springer
13 years 9 months ago
2008
Springer
This paper investigates reconfigurable architectures suitable for chip multiprocessors (CMPs). Prior research has established that augmenting a conventional processor with reconfi...