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IESS
2007
Springer
165views Hardware» more  IESS 2007»
14 years 1 months ago
Data Reuse Driven Memory and Network-On-Chip Co-Synthesis
NoCs present a possible communication infrastructure solution to deal with increased design complexity and shrinking time-to-market. The communication infrastructure is a signific...
Ilya Issenin, Nikil Dutt
WSC
1998
13 years 9 months ago
Applying Temporal Databases to HLA Data Collection and Analysis
The High Level Architecture (HLA) for distributed simulations was proposed by the Defense Modeling and Simulation Office of the Department of Defense (DOD) in order to support int...
Thom McLean, Leo Mark, Margaret L. Loper, David Ro...
DATE
2003
IEEE
135views Hardware» more  DATE 2003»
14 years 1 months ago
Creating Value Through Test
Test is often seen as a necessary evil; it is a fact of life that ICs have manufacturing defects and those need to be filtered out by testing before the ICs are shipped to the cu...
Erik Jan Marinissen, Bart Vermeulen, Robert Madge,...
ANTSW
2008
Springer
13 years 9 months ago
A Simulation Study of Routing Performance in Realistic Urban Scenarios for MANETs
Abstract. We study through simulation the performance of two MANET routing algorithms in a realistic urban environment. The two algorithms, AODV and AntHocNet, are representative o...
Gianni Di Caro, Frederick Ducatelle, Luca Maria Ga...
CODES
2010
IEEE
13 years 4 months ago
Hardware/software optimization of error detection implementation for real-time embedded systems
This paper presents an approach to system-level optimization of error detection implementation in the context of fault-tolerant realtime distributed embedded systems used for safe...
Adrian Lifa, Petru Eles, Zebo Peng, Viacheslav Izo...