100 search results - page 7 / 20 » A decoupled KILO-instruction processor |
MICRO
2005
IEEE
14 years 3 months ago
2005
IEEE
Until recently, a steadily rising clock rate and other uniprocessor microarchitectural improvements could be relied upon to consistently deliver increasing performance for a wide ...
IEEEPACT
2009
IEEE
14 years 4 months ago
2009
IEEE
Abstract—In order to harness the full compute power of manycore processors, future designs must focus on effective utilization of on-chip cache and bandwidth resources. In this p...
ICCD
2006
IEEE
14 years 6 months ago
2006
IEEE
The placement of on-die decoupling capacitors (decap) between the power and ground supply grids has become a common practice in high performance processor designs. In this paper, ...
HPCA
1999
IEEE
14 years 2 months ago
1999
IEEE
This work presents and evaluates a novel processor microarchitecture which combines two paradigms: access/ execute decoupling and simultaneous multithreading. We investigate how b...
IPPS
2009
IEEE
14 years 4 months ago
2009
IEEE
DTA (Decoupled Threaded Architecture) is designed to exploit fine/medium grained Thread Level Parallelism (TLP) by using a distributed hardware scheduling unit and relying on exi...