102 search results - page 9 / 21 » A design platform for 90-nm leakage reduction techniques |
ISLPED
2005
ACM
14 years 1 months ago
2005
ACM
Temperature is becoming a first rate design criterion in ASICs due to its negative impact on leakage power, reliability, performance, and packaging cost. Incorporating awareness o...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
- Traditionally, minimum possible area of a VLSI layout is considered the best for delay and power minimization due to decreased interconnect capacitance. This paper shows however ...
ICCD
2008
IEEE
14 years 4 months ago
2008
IEEE
— Run-time Active Leakage Reduction (RALR) is a recent technique and aims at aggressively reducing leakage power consumption. This paper studies the feasibility of RALR from the ...
ICPP
2009
IEEE
13 years 5 months ago
2009
IEEE
This paper evaluates several techniques to save leakage in CMP L2 caches by selectively switching off the less used lines. We primarily focus on private snoopy L2 caches. In this c...
CASES
2006
ACM
14 years 1 months ago
2006
ACM
Rising interest in the applications of wireless sensor networks has spurred research in the development of computing systems for lowthroughput, energy-constrained applications. Un...