A differential current-steering digital-to-analog converter (DAC) architecture allowing the common-mode level of the input signal to be varied is presented. Simulation results wit...
K. Ola Andersson, N. U. Andersson, Mark Vesterback...
A physical yet compact gate delay model is developed integrating short-channel effects and the Alpha-power law based timing model. This analytical approach accurately predicts bot...
A methodology for architecture exploration of look-up table based decoders is presented. For the degree of parallel processing a trade-off can be made by exploring system level an...
This paper proposes an equation-based multi-scenario iterative robust optimization methodology for analog/mixed-signal circuits. We show that due to local circuit performance mono...
Multi-threshold CMOS is an increasingly popular circuit approach that enables high performance and low power operation. However, no methodologies have been developed to size the h...
James Kao, Anantha Chandrakasan, Dimitri Antoniadi...