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» A fast algorithm for power grid design
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DAC
2010
ACM
13 years 5 months ago
Tradeoff analysis and optimization of power delivery networks with on-chip voltage regulation
Integrating a large number of on-chip voltage regulators holds the promise of solving many power delivery challenges through strong local load regulation and facilitates systemlev...
Zhiyu Zeng, Xiaoji Ye, Zhuo Feng, Peng Li
IWCMC
2006
ACM
14 years 1 months ago
Cross-layer performance analysis of joint rate and power adaptation schemes with multiple-user contention in Nakagami fading cha
Adaptively adjusting transmission rate and power to concurrently enhance goodput and save energy is an important issue in the wireless local area network (WLAN). However, goodput ...
Li-Chun Wang, Kuang-Nan Yen, Jane-Hwa Huang, Ander...
ICCAD
2009
IEEE
89views Hardware» more  ICCAD 2009»
13 years 5 months ago
Decoupling capacitance efficient placement for reducing transient power supply noise
Decoupling capacitance (decap) is an efficient way to reduce transient noise in on-chip power supply networks. However, excessive decap may cause more leakage power, chip resource...
Xiaoyi Wang, Yici Cai, Qiang Zhou, Sheldon X.-D. T...
ANCS
2005
ACM
14 years 1 months ago
SSA: a power and memory efficient scheme to multi-match packet classification
New network applications like intrusion detection systems and packet-level accounting require multi-match packet classification, where all matching filters need to be reported. Te...
Fang Yu, T. V. Lakshman, Martin Austin Motoyama, R...
DATE
2006
IEEE
133views Hardware» more  DATE 2006»
14 years 1 months ago
Automatic generation of operation tables for fast exploration of bypasses in embedded processors
Customizing the bypasses in an embedded processor uncovers valuable trade-offs between the power, performance and the cost of the processor. Meaningful exploration of bypasses re...
Sanghyun Park, Eugene Earlie, Aviral Shrivastava, ...