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» A fast algorithm for power grid design
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ISPD
1997
ACM
100views Hardware» more  ISPD 1997»
13 years 11 months ago
A pseudo-hierarchical methodology for high performance microprocessor design
- This paper reports on a highly effective methodology to construct complex high performance microprocessors. Critical aspects of the methodology include an integrated database for...
A. Bertolet, K. Carpenter, Keith M. Carrig, Albert...
TOG
2012
230views Communications» more  TOG 2012»
11 years 10 months ago
Decoupling algorithms from schedules for easy optimization of image processing pipelines
Using existing programming tools, writing high-performance image processing code requires sacrificing readability, portability, and modularity. We argue that this is a consequenc...
Jonathan Ragan-Kelley, Andrew Adams, Sylvain Paris...
DAC
1998
ACM
13 years 12 months ago
Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
Ganesh Lakshminarayana, Niraj K. Jha
DATE
2010
IEEE
121views Hardware» more  DATE 2010»
14 years 21 days ago
Properties of and improvements to time-domain dynamic thermal analysis algorithms
—Temperature has a strong influence on integrated circuit (IC) performance, power consumption, and reliability. However, accurate thermal analysis can impose high computation co...
Xi Chen, Robert P. Dick, Li Shang
ASPDAC
2008
ACM
91views Hardware» more  ASPDAC 2008»
13 years 9 months ago
Heuristic power/ground network and floorplan co-design method
It's a trend to consider power supply integrity at early stage to improve the design quality. In this paper, we propose a novel algorithm to optimize floorplan together with P...
Xiaoyi Wang, Jin Shi, Yici Cai, Xianlong Hong