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ICC
2007
IEEE
137views Communications» more  ICC 2007»
15 years 10 months ago
A Novel Algorithm and Architecture for High Speed Pattern Matching in Resource-Limited Silicon Solution
— Network Intrusion Detection Systems (NIDS) are more and more important for identifying and preventing the malicious attacks over the network. This paper proposes a novel cost-e...
Nen-Fu Huang, Yen-Ming Chu, Chi-Hung Tsai, Chen-Yi...
IJCNN
2007
IEEE
15 years 10 months ago
On Extending the SMO Algorithm Sub-Problem
—The Support Vector Machine is a widely employed machine learning model due to its repeatedly demonstrated superior generalization performance. The Sequential Minimal Optimizatio...
Christopher Sentelle, Michael Georgiopoulos, Georg...
IPPS
2007
IEEE
15 years 10 months ago
Towards Optimal Multi-level Tiling for Stencil Computations
Stencil computations form the performance-critical core of many applications. Tiling and parallelization are two important optimizations to speed up stencil computations. Many til...
Lakshminarayanan Renganarayanan, Manjukumar Harthi...
ISCAS
2007
IEEE
84views Hardware» more  ISCAS 2007»
15 years 10 months ago
High Speed 1-bit Bypass Adder Design for Low Precision Additions
—In this paper, we propose a high speed adder which is adopted for our reconfigurable architecture called FleXilicon. To support sub-word parallelism, the FleXilicon architecture...
Jong-Suk Lee, Dong Sam Ha
MICRO
2007
IEEE
108views Hardware» more  MICRO 2007»
15 years 10 months ago
FPGA-Accelerated Simulation Technologies (FAST): Fast, Full-System, Cycle-Accurate Simulators
This paper describes FAST, a novel simulation methodology that can produce simulators that (i) are orders of magnitude faster than comparable simulators, (ii) are cycleaccurate, (...
Derek Chiou, Dam Sunwoo, Joonsoo Kim, Nikhil A. Pa...