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TC
2011
13 years 3 months ago
Energy Reduction in Consolidated Servers through Memory-Aware Virtual Machine Scheduling
—Increasing energy consumption in server consolidation environments leads to high maintenance costs for data centers. Main memory, no less than processor, is a major energy consu...
Jae-Wan Jang, Myeongjae Jeon, Hyo-Sil Kim, Heeseun...
ISLPED
1995
ACM
70views Hardware» more  ISLPED 1995»
13 years 12 months ago
Transformation and synthesis of FSMs for low-power gated-clock implementation
We present a technique that automatically synthesizes nite state machines with gated clocks to reduce the power dissipation of the nal implementation. We describe a new transfor...
Luca Benini, Giovanni De Micheli
ISCAS
2007
IEEE
132views Hardware» more  ISCAS 2007»
14 years 2 months ago
High Read Stability and Low Leakage Cache Memory Cell
- Data in conventional six transistor (6T) static random access memory (SRAM) cells are vulnerable to noise due to the direct access to the data storage nodes through the bit lines...
Zhiyu Liu, Volkan Kursun
ISLPED
2003
ACM
149views Hardware» more  ISLPED 2003»
14 years 1 months ago
Elements of low power design for integrated systems
The increasing prominence of portable systems and the need to limit power consumption and hence, heat dissipation in very high density VLSI chips have led to rapid and innovative ...
Sung-Mo Kang
GLVLSI
2007
IEEE
115views VLSI» more  GLVLSI 2007»
14 years 2 months ago
Novel architectures for efficient (m, n) parallel counters
Parallel counters are key elements in many arithmetic circuits, especially fast multipliers. In this paper, novel architectures and designs for high speed, low power (3, 2), (7, 3...
Sreehari Veeramachaneni, Lingamneni Avinash, Kirth...