105 search results - page 8 / 21 » A gate resizing technique for high reduction in power consum... |
ISVLSI
2008
IEEE
14 years 2 months ago
2008
IEEE
Intelligent mobile information devices require lowpower and high-performance processors. In order to reduce energy consumption with maintaining computing performance, we proposed ...
ICCD
2004
IEEE
14 years 5 months ago
2004
IEEE
A negative effect of ever-shrinking supply and threshold voltages is the larger percentage of total power consumption that comes from leakage current. Several techniques have been...
ISPDC
2003
IEEE
14 years 1 months ago
2003
IEEE
— This paper presents a new power management technique integrated into a multithreaded microcontroller with builtin real-time scheduling schemes. Power management is done by hard...
DAC
1998
ACM
14 years 9 months ago
1998
ACM
Power consumption has become one of the biggest challenges in high-performance microprocessor design. The rapid increase in the complexity and speed of each new CPU generation is ...
ISLPED
1995
ACM
13 years 12 months ago
1995
ACM
We argue that the clocked-CMOS (C2MOS) circuit family provides a very high throughput and low power alternative to other existing circuit techniques for the fast developing market...