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EH
2003
IEEE
136views Hardware» more  EH 2003»
14 years 1 months ago
Experimental Results in Evolutionary Fault-Recovery for Field Programmable
This paper presents experimental results of fast intrinsic evolutionary design and evolutionary fault recovery of a 4-bit Digital to Analog Converter (DAC) using the JPL stand-alo...
Ricardo Salem Zebulum, Didier Keymeulen, Vu Duong,...
DATE
2000
IEEE
142views Hardware» more  DATE 2000»
14 years 15 days ago
Power and Delay Reduction via Simultaneous Logic and Placement Optimization in FPGAs
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...
Balakrishna Kumthekar, Fabio Somenzi
MSS
2000
IEEE
89views Hardware» more  MSS 2000»
14 years 14 days ago
Access Coordination of Tertiary Storage for High Energy Physics Applications
We describe a real implementation of a software component that manages caching of files from a tertiary storage management system to a large disk cache developed for use in the a...
Luis M. Bernardo, Arie Shoshani, Alex Sim, Henrik ...
DATE
2009
IEEE
123views Hardware» more  DATE 2009»
13 years 12 months ago
Novel library of logic gates with ambipolar CNTFETs: Opportunities for multi-level logic synthesis
This paper exploits the unique in-field controllability of the device polarity of ambipolar carbon nanotube field effect transistors (CNTFETs) to design a technology library with ...
M. Haykel Ben Jamaa, Kartik Mohanram, Giovanni De ...
DATE
2004
IEEE
123views Hardware» more  DATE 2004»
13 years 11 months ago
Synthesis and Optimization of Threshold Logic Networks with Application to Nanotechnologies
We propose an algorithm for efficient threshold network synthesis of arbitrary multi-output Boolean functions. The main purpose of this work is to bridge the wide gap that currentl...
Rui Zhang, Pallav Gupta, Lin Zhong, Niraj K. Jha