1013 search results - page 24 / 203 » A hardware implementation of realloc function |
IJCSS
2007
13 years 7 months ago
2007
This paper presents a low power driven synthesis framework for the unique class of nonregenerative Boolean Read-Once Functions (BROF). A two-pronged approach is adopted, where the...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
In this paper, we present power emulation, a novel design paradigm that utilizes hardware acceleration for the purpose of fast power estimation. Power emulation is based on the ob...
ISPD
2006
ACM
14 years 1 months ago
2006
ACM
APlace is a high quality, scalable analytical placer. This paper describes our recent efforts to improve APlace for speed and scalability. We explore various wirelength and densi...
3DPVT
2006
IEEE
14 years 1 months ago
2006
IEEE
In this work we propose a scanline optimization procedure for computational stereo using a linear smoothness cost model performed by programmable graphics hardware. The main idea ...
AHS
2006
IEEE
14 years 1 months ago
2006
IEEE
Self-reconfigurable adaptive systems have the possibility of adapting their own hardware configuration. This feature provides enhanced performance and flexibility, reflected i...