Sciweavers

1013 search results - page 38 / 203
» A hardware implementation of realloc function
Sort
View
DSD
2010
IEEE
133views Hardware» more  DSD 2010»
13 years 5 months ago
Area and Speed Oriented Implementations of Asynchronous Logic Operating under Strong Constraints
Asynchronous circuit implementations operating under strong constraints (DIMS, Direct Logic, some of NCL gates, etc.) are attractive due to: 1) regularity; 2) combined implementati...
Igor Lemberski, Petr Fiser
DSD
2004
IEEE
129views Hardware» more  DSD 2004»
13 years 11 months ago
Functional Validation of Programmable Architectures
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
Prabhat Mishra, Nikil D. Dutt
DAC
2009
ACM
13 years 5 months ago
A physical unclonable function defined using power distribution system equivalent resistance variations
For hardware security applications, the availability of secret keys is a critical component for secure activation, IC authentication and for other important applications including...
Ryan Helinski, Dhruva Acharyya, Jim Plusquellic
DFT
2003
IEEE
120views VLSI» more  DFT 2003»
14 years 1 months ago
Implementation and Testing of Fault-Tolerant Photodiode-Based Active Pixel Sensor (APS)
The implementation of imaging arrays for System-On-a-Chip (SOC) is aided by using faulttolerant light sensors. Fault-tolerant redundancy in an Active Pixel Sensor (APS) is obtaine...
Sunjaya Djaja, Glenn H. Chapman, Desmond Y. H. Che...
ISLPED
1996
ACM
102views Hardware» more  ISLPED 1996»
13 years 12 months ago
High-level power estimation and the area complexity of Boolean functions
Estimation of the area complexity of a Boolean function from its functional description is an important step towards a power estimation capability at the register transfer level (...
Mahadevamurty Nemani, Farid N. Najm