1013 search results - page 64 / 203 » A hardware implementation of realloc function |
ICCD
2007
IEEE
13 years 11 months ago
2007
IEEE
Transaction-level modeling (TLM) allows a designer to save functional verification effort during the modular refinement of an SoC by reusing the prior implementation of a module a...
ASPDAC
2001
ACM
13 years 11 months ago
2001
ACM
Abstract- Avirtual interfacebetweenJava andFPGA for networked reconfigurationis presented. ThroughtheJavaflFPGAinterface,Java applicationscan exploithardwareaccelerators with FPGAs...
IMSCCS
2006
IEEE
14 years 1 months ago
2006
IEEE
The computer architecture of Single-chip multiprocessor (SCMP) is one of important research topics in developing the next-generation of computer hardware. A verification environme...
HASKELL
2006
ACM
14 years 1 months ago
2006
ACM
Modern functional languages offer several attractive features to support development of reliable and secure software. However, in our efforts to use Haskell for systems programmin...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
The continuous improvement on the design methodologies and processes has made possible the creation of huge and very complex digital systems. Design verification is one of the mai...