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DATE
2000
IEEE
136views Hardware» more  DATE 2000»
14 years 10 days ago
Smart Antenna Receiver Based on a Single Chip Solution for GSM/DCS Baseband Processing
This paper presents a single chip implementation of a space-time algorithm for co-channel interference (CCI) and intersymbol interference (ISI) reduction in GSM/DCS systems. The t...
U. Girola, A. Picciriello, D. Vincenzoni
ISMVL
2009
IEEE
189views Hardware» more  ISMVL 2009»
14 years 2 months ago
A Quaternary Decision Diagram Machine and the Optimization of its Code
We show the advantage of Quarternary Decision Diagrams (QDDs) in representing and evaluating logic functions. That is, we show how QDDs are used to implement QDD machines, which y...
Tsutomu Sasao, Hiroki Nakahara, Munehiro Matsuura,...
ICCAD
2008
IEEE
117views Hardware» more  ICCAD 2008»
14 years 2 months ago
A novel sequential circuit optimization with clock gating logic
— To save power consumption, it has been shown that the clock signal can be gated without changing the functionality under certain clock-gating conditions. We observe that the cl...
Yu-Min Kuo, Shih-Hung Weng, Shih-Chieh Chang
ISCAS
2005
IEEE
132views Hardware» more  ISCAS 2005»
14 years 1 months ago
N-scroll chaotic attractors from a general jerk circuit
— This paper proposes a novel nonlinear modulating function approach for generating n−scroll chaotic attractors based on a general jerk circuit. The systematic nonlinear modula...
Simin Yu, Jinhu Lu, Henry Leung, Guanrong Chen
CAV
2006
Springer
146views Hardware» more  CAV 2006»
13 years 11 months ago
Termination Analysis with Calling Context Graphs
We introduce calling context graphs and various static and theorem proving based analyses that together provide a powerful method for proving termination of programs written in fea...
Panagiotis Manolios, Daron Vroon