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ICIP
2006
IEEE
14 years 9 months ago
Hardware Computation of Moment Functions in a Silicon Retina using Binary Patterns
We present in this paper a method for implementing moment functions in a CMOS retina for shape recognition applications. The method is based on the use of binary patterns and it a...
Olivier Aubreton, Lew Fock Chong Lew Yan Voon, Guy...
ICCAD
2004
IEEE
128views Hardware» more  ICCAD 2004»
14 years 4 months ago
Power estimation for cycle-accurate functional descriptions of hardware
— Cycle-accurate functional descriptions (CAFDs) are being widely adopted in integrated circuit (IC) design flows. Power estimation can potentially benefit from the inherent in...
Lin Zhong, Srivaths Ravi, Anand Raghunathan, Niraj...
EUROGP
2000
Springer
116views Optimization» more  EUROGP 2000»
13 years 11 months ago
An Extrinsic Function-Level Evolvable Hardware Approach
1 The function level evolvable hardware approach to synthesize the combinational multiple-valued and binary logic functions is proposed in rst time. The new representation of logic...
Tatiana Kalganova
ASAP
2010
IEEE
193views Hardware» more  ASAP 2010»
13 years 9 months ago
Automatic generation of polynomial-based hardware architectures for function evaluation
Abstract--Polynomial approximation is a very general technique for the evaluation of a wide class of numerical functions of one variable. This article details an architecture gener...
Florent de Dinechin, Mioara Joldes, Bogdan Pasca
FPL
2006
Springer
158views Hardware» more  FPL 2006»
13 years 11 months ago
Placing Functionality in Fault-Tolerant Hardware/Software Reconfigurable Networks
A novel framework shows the potential of FPGA-based systems for increasing fault-tolerance and flexibility by placing functionality onto free hardware (HW) or software (SW) resour...
Thilo Streichert