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ISLPED
2010
ACM
231views Hardware» more  ISLPED 2010»
13 years 7 months ago
3D-nonFAR: three-dimensional non-volatile FPGA architecture using phase change memory
Memories play a key role in FGPAs in the forms of both programming bits and embedded memory blocks. FPGAs using non-volatile memories have been the focus of attention with zero bo...
Yibo Chen, Jishen Zhao, Yuan Xie
DATE
2010
IEEE
161views Hardware» more  DATE 2010»
14 years 17 days ago
Aging-resilient design of pipelined architectures using novel detection and correction circuits
—Time-dependent performance degradation due to transistor aging caused by mechanisms such as Negative Bias Temperature Instability (NBTI) and Hot Carrier Injection (HCI) is one o...
Hamed F. Dadgour, Kaustav Banerjee
ISLPED
2003
ACM
155views Hardware» more  ISLPED 2003»
14 years 22 days ago
Low-power high-level synthesis for FPGA architectures
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Deming Chen, Jason Cong, Yiping Fan
27
Voted
CVPR
2009
IEEE
1626views Computer Vision» more  CVPR 2009»
15 years 2 months ago
Coded Exposure Deblurring: Optimized Codes for PSF Estimation and Invertibility
We consider the problem of single image object motion deblurring from a static camera. It is well known that deblurring of moving objects using a traditional camera is ill-posed, d...
Amit K. Agrawal, Yi Xu
CODES
2003
IEEE
14 years 24 days ago
Design space exploration of a hardware-software co-designed GF(2m) galois field processor for forward error correction and crypt
This paper describes a hardware-software co-design approach for flexible programmable Galois Field Processing for applications which require operations over GF(2m ), such as RS an...
Wei Ming Lim, Mohammed Benaissa