24 search results - page 1 / 5 » A loop accelerator for low power embedded VLIW processors |
CODES
2004
IEEE
14 years 2 months ago
2004
IEEE
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
ASPDAC
2004
ACM
14 years 4 months ago
2004
ACM
— For multimedia applications, loop buffering is an efficient mechanism to reduce the power in the instruction memory of embedded processors. In particular, software controlled ...
IPPS
2010
IEEE
13 years 8 months ago
2010
IEEE
Very Long Instruction Word (VLIW) processors are a popular choice in embedded domain due to their hardware simplicity, low cost and low power consumption. Simultaneous MultiThreadi...
MICRO
2002
IEEE
14 years 3 months ago
2002
IEEE
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...
DATE
2006
IEEE
14 years 4 months ago
2006
IEEE
Reduced energy consumption is one of the most important design goals for embedded application domains like wireless, multimedia and biomedical. Instruction memory hierarchy has be...