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VLSID
2007
IEEE
206views VLSI» more  VLSID 2007»
14 years 7 months ago
MAX: A Multi Objective Memory Architecture eXploration Framework for Embedded Systems-on-Chip
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
DAC
1995
ACM
13 years 11 months ago
Efficient Power Estimation for Highly Correlated Input Streams
- Power estimation in combinational modules is addressed from a probabilistic point of view. The zero-delay hypothesis is considered and under highly correlated input streams, the ...
Radu Marculescu, Diana Marculescu, Massoud Pedram
ISCAS
2006
IEEE
163views Hardware» more  ISCAS 2006»
14 years 1 months ago
ASIC hardware implementation of the IDEA NXT encryption algorithm
— Symmetric-key block ciphers are often used to provide data confidentiality with low complexity, especially in the case of dedicated hardware implementations. IDEA NXT is a nov...
Marco Macchetti, Wenyu Chen
GECCO
2009
Springer
193views Optimization» more  GECCO 2009»
14 years 3 days ago
Optimization of dynamic memory managers for embedded systems using grammatical evolution
New portable consumer embedded devices must execute multimedia applications (e.g., 3D games, video players and signal processing software, etc.) that demand extensive memory acces...
José L. Risco-Martín, David Atienza,...
DATE
2005
IEEE
109views Hardware» more  DATE 2005»
14 years 1 months ago
ISEGEN: Generation of High-Quality Instruction Set Extensions by Iterative Improvement
Customization of processor architectures through Instruction Set Extensions (ISEs) is an effective way to meet the growing performance demands of embedded applications. A high-qua...
Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, ...