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ISQED
2002
IEEE
106views Hardware» more  ISQED 2002»
14 years 15 days ago
Trading off Reliability and Power-Consumption in Ultra-low Power Systems
Critical systems like pace-makers, defibrillators, wearable computers and other electronic gadgets have to be designed not only for reliability but also for ultra-low power consu...
Atul Maheshwari, Wayne Burleson, Russell Tessier
ISLPED
2004
ACM
110views Hardware» more  ISLPED 2004»
14 years 1 months ago
Reducing pipeline energy demands with local DVS and dynamic retiming
The quadratic relationship between voltage and energy has made dynamic voltage scaling (DVS) one of the most powerful techniques to reduce system power demands. Recently, techniqu...
Seokwoo Lee, Shidhartha Das, Toan Pham, Todd M. Au...
GLVLSI
2005
IEEE
104views VLSI» more  GLVLSI 2005»
14 years 1 months ago
Wave-pipelined 2-slot time division multiplexed (WP/2-TDM) routing
The ever-increasing number of transistors on a chip has resulted in very large scale integration (VLSI) systems whose performance and manufacturing costs are driven by on-chip wir...
Ajay Joshi, Jeffrey A. Davis
IJHCI
2010
144views more  IJHCI 2010»
13 years 6 months ago
Naturalistic Decision Making for Power System Operators
Motivation – Investigations of large-scale outages in the North American interconnected electric system often attribute the causes to three T’s: Trees, Training and Tools. To ...
Frank L. Greitzer, Robin Podmore, Marck Robinson, ...
DATE
2006
IEEE
104views Hardware» more  DATE 2006»
14 years 1 months ago
Contrasting a NoC and a traditional interconnect fabric with layout awareness
Increasing miniaturization is posing multiple challenges to electronic designers. In the context of Multi-Processor System-onChips (MPSoCs), we focus on the problem of implementin...
Federico Angiolini, Paolo Meloni, Salvatore Carta,...