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PATMOS
2010
Springer
13 years 7 months ago
L1 Data Cache Power Reduction Using a Forwarding Predictor
In most modern processor designs the L1 data cache has become a major consumer of power due to its increasing size and high frequency access rate. In order to reduce this power con...
P. Carazo, R. Apolloni, Fernando Castro, Daniel Ch...
QSIC
2007
IEEE
14 years 4 months ago
Verifying Noninterference in a Cyber-Physical System The Advanced Electric Power Grid
The advanced electric power grid is a complex real-time system having both Cyber and Physical components. While each component may function correctly, independently, their composi...
Yan Sun, Bruce M. McMillin, Xiaoqing Frank Liu, Da...
WEBDB
2005
Springer
105views Database» more  WEBDB 2005»
14 years 3 months ago
On the Expressive Power of Node Construction in XQuery
In the relational model it has been shown that the flat relational algebra has the same expressive power as the nested relational algebra, as far as queries over flat relations ...
Wim Le Page, Jan Hidders, Philippe Michiels, Jan P...
ICCAD
1997
IEEE
99views Hardware» more  ICCAD 1997»
14 years 1 months ago
High-level area and power estimation for VLSI circuits
High-level power estimation, when given only a high-level design specification such as a functional or RTL description, requires high-level estimation of the circuit average acti...
Mahadevamurty Nemani, Farid N. Najm
ISSS
2002
IEEE
142views Hardware» more  ISSS 2002»
14 years 2 months ago
Energy/Power Estimation of Regular Processor Arrays
We propose a high-level analytical model for estimating the energy and/or power dissipation in VLSI processor (systolic) array implementations of loop programs, particularly for i...
Sanjay V. Rajopadhye, Steven Derrien