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DATE
2004
IEEE
134views Hardware» more  DATE 2004»
13 years 11 months ago
Cost-Efficient Block Verification for a UMTS Up-Link Chip-Rate Coprocessor
ASIC designs for future communication applications cannot be simulated exhaustively. Formal Property Checking is a powerful technology to overcome the limitations of current funct...
Klaus Winkelmann, Hans-Joachim Trylus, Dominik Sto...
SCHOLARPEDIA
2011
12 years 10 months ago
N-body simulations
Abstract. Scientists’ ability to generate and collect massive-scale datasets is increasing. As a result, constraints in data analysis capability rather than limitations in the av...
INFOCOM
2003
IEEE
14 years 28 days ago
Blocking Probabilities of Optical Burst Switching Networks Based on Reduced Load Fixed Point Approximations
— This paper provides a framework for analysis and performance evaluation of Optical Burst Switching (OBS) networks. In particular, a new reduced load fixed point approximation ...
Zvi Rosberg, Hai Le Vu, Moshe Zukerman, Jolyon Whi...
RTAS
2005
IEEE
14 years 1 months ago
Bounding Worst-Case Data Cache Behavior by Analytically Deriving Cache Reference Patterns
While caches have become invaluable for higher-end architectures due to their ability to hide, in part, the gap between processor speed and memory access times, caches (and partic...
Harini Ramaprasad, Frank Mueller
TACS
1994
Springer
13 years 11 months ago
Separate Abstract Interpretation for Control-Flow Analysis
Abstract Interpretation for Control-Flow Analysis Yan Mei Tang and Pierre Jouvelot CRI, Ecole des Mines de Paris, France Effect systems and abstract interpretation are two methods ...
Yan Mei Tang, Pierre Jouvelot