155 search results - page 14 / 31 » A new heuristic algorithm for reversible logic synthesis |
DATE
2010
IEEE
14 years 18 days ago
2010
IEEE
Abstract—We present a throughput-driven partitioning algorithm and a throughput-preserving merging algorithm for the high-level physical synthesis of latency-insensitive (LI) sys...
PPDP
2005
Springer
14 years 1 months ago
2005
Springer
The paper describes a constraint-based solution to the protein folding problem on face-centered cubic lattices—a biologically meaningful approximation of the general protein fol...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
Multi-input addition is an important operation for many DSP and video processing applications. On FPGAs, multi-input addition has traditionally been implemented using trees of car...
TCAD
2008
13 years 7 months ago
2008
The relatively poor scaling of interconnect in modern digital circuits necessitates a number of design optimizations, which must typically be iterated several times to meet the spe...
ICCAD
1999
IEEE
13 years 11 months ago
1999
IEEE
Algorithmic logic synthesis is usually carried out in two stages, the independent stage where logic minimization is performed on the Boolean equations with no regard to physical p...