155 search results - page 9 / 31 » A new heuristic algorithm for reversible logic synthesis |
SAT
2007
Springer
14 years 1 months ago
2007
Springer
SAT solvers are often challenged with very hard problems that remain unsolved after hours of CPU time. The research community meets the challenge in two ways: (1) by improving the ...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Highly regular, nanodevice based architectures have been proposed to replace pure CMOS based architectures in the emerging post CMOS era. Since bottom-up self-assembly is used to ...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Structuring and mapping of a Boolean function is an important problem in the design of complex integrated circuits. Libraryaware constructive decomposition offers a solution to th...
DATE
2000
IEEE
13 years 12 months ago
2000
IEEE
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...
ISPD
2003
ACM
14 years 24 days ago
2003
ACM
In this paper we present the Gain-based Logic Block Array (GLA), a new via-programmable regular fabric. GLA is an array of Gainbased Logic Blocks (GLBs). The GLB is a semi-univers...