405 search results - page 16 / 81 » A novel cache architecture with enhanced performance and sec... |
ASPLOS
2006
ACM
14 years 1 months ago
2006
ACM
Cycles per Instruction (CPI) stacks break down processor execution time into a baseline CPI plus a number of miss event CPI components. CPI breakdowns can be very helpful in gaini...
INFOSCALE
2007
ACM
13 years 9 months ago
2007
ACM
— To address the rapid growth of the Internet, modern Web search engines have to adopt distributed organizations, where the collection of indexed documents is partitioned among s...
IEEEPACT
2007
IEEE
14 years 1 months ago
2007
IEEE
As multi-core architectures flourish in the marketplace, multi-application workload scenarios (such as server consolidation) are growing rapidly. When running multiple application...
ISCA
2006
IEEE
14 years 1 months ago
2006
IEEE
Protection from hardware attacks such as snoopers and mod chips has been receiving increasing attention in computer architecture. This paper presents a new combined memory encrypt...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—We present the aEqualized routing algorithm: a novel algorithm for the Spidergon Network on Chip. AEqualized combines the well known aFirst and aLast algorithms proposed in lite...