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DSD
2009
IEEE
147views Hardware» more  DSD 2009»
15 years 8 months ago
A High Performance Hardware Architecture for One Bit Transform Based Motion Estimation
Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. One bit transform (1BT) based ME algorithms have low computat...
Abdulkadir Akin, Yigit Dogan, Ilker Hamzaoglu
VLSID
2001
IEEE
164views VLSI» more  VLSID 2001»
16 years 4 months ago
An Efficient Parallel Transparent Bist Method For Multiple Embedded Memory Buffers
In this paper, we propose a new transparent built-in self-test ( TBIST ) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent tes...
Der-Cheng Huang, Wen-Ben Jone, Sunil R. Das
ISVLSI
2002
IEEE
104views VLSI» more  ISVLSI 2002»
15 years 9 months ago
Scalable VLSI Architecture for GF(p) Montgomery Modular Inverse Computation
Modular inverse computation is needed in several public key cryptographic applications. In this work, we present two VLSI hardware implementations used in the calculation of Montg...
Adnan Abdul-Aziz Gutub, Alexandre F. Tenca, &Ccedi...
VIS
2009
IEEE
304views Visualization» more  VIS 2009»
16 years 5 months ago
GL4D: A GPU-based Architecture for Interactive 4D Visualization
This paper describes GL4D, an interactive system for visualizing 2-manifolds and 3-manifolds embedded in four Euclidean dimensions and illuminated by 4D light sources. It is a tetr...
Alan Chu, Chi-Wing Fu, Andrew J. Hanson, Pheng-...
ICDCS
1996
IEEE
15 years 8 months ago
How to Recover Efficiently and Asynchronously when Optimism Fails
We propose a new algorithm for recovering asynchronously from failures in a distributed computation. Our algorithm is based on two novel concepts - a fault-tolerant vector clock t...
Om P. Damani, Vijay K. Garg