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CODES
2004
IEEE
13 years 11 months ago
Analytical models for leakage power estimation of memory array structures
There is a growing need for accurate power models at the system level. Memory structures such as caches, Branch Target Buffers (BTBs), and register files occupy significant area i...
Mahesh Mamidipaka, Kamal S. Khouri, Nikil D. Dutt,...
DATE
2009
IEEE
143views Hardware» more  DATE 2009»
14 years 2 months ago
Dimensioning heterogeneous MPSoCs via parallelism analysis
—In embedded computing we face a continuously growing algorithm complexity combined with a constantly rising number of applications running on a single system. Multi-core systems...
Bastian Ristau, Torsten Limberg, Oliver Arnold, Ge...
ICCD
2006
IEEE
117views Hardware» more  ICCD 2006»
14 years 4 months ago
System-Level Energy Modeling for Heterogeneous Reconfigurable Chip Multiprocessors
—Field-Programmable Gate Array (FPGA) technology is characterized by continuous improvements that provide new opportunities in system design. Multiprocessors-ona-Programmable-Chi...
Xiaofang Wang, Sotirios G. Ziavras
23
Voted
SIGMETRICS
2003
ACM
129views Hardware» more  SIGMETRICS 2003»
14 years 22 days ago
Run-time modeling and estimation of operating system power consumption
The increasing constraints on power consumption in many computing systems point to the need for power modeling and estimation for all components of a system. The Operating System ...
Tao Li, Lizy Kurian John
DAC
1997
ACM
13 years 11 months ago
Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha C...