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» A power-configurable bus for embedded systems
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DATE
2004
IEEE
154views Hardware» more  DATE 2004»
13 years 11 months ago
MultiNoC: A Multiprocessing System Enabled by a Network on Chip
The MultiNoC system implements a programmable onchip multiprocessing platform built on top of an efficient, low area overhead intra-chip interconnection scheme. The employed inter...
Aline Mello, Leandro Möller, Ney Calazans, Fe...
DATE
2000
IEEE
132views Hardware» more  DATE 2000»
13 years 11 months ago
A Generic Architecture for On-Chip Packet-Switched Interconnections
This paper presents an architectural study of a scalable system-level interconnection template. We explain why the shared bus, which is today's dominant template, will not me...
Pierre Guerrier, Alain Greiner
LCTRTS
2005
Springer
14 years 26 days ago
System-wide compaction and specialization of the linux kernel
The limited built-in configurability of Linux can lead to expensive code size overhead when it is used in the embedded market. To overcome this problem, we propose the applicatio...
Dominique Chanet, Bjorn De Sutter, Bruno De Bus, L...
RTCSA
2000
IEEE
13 years 11 months ago
Frame packing in real-time communication
A common computational model in distributed embedded systems is that the nodes exchange signals via a network. Most often a signal represents the state of some physical device and...
Kristian Sandström, Christer Norström, M...
FPL
2007
Springer
146views Hardware» more  FPL 2007»
14 years 1 months ago
Efficient External Memory Interface for Multi-processor Platforms Realized on FPGA Chips
The complexity of today’s embedded applications requires modern high-performance embedded System-on-Chip (SoC) platforms to be multiprocessor architectures. Advances in FPGA tec...
Hristo Nikolov, Todor Stefanov, Ed F. Deprettere