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» A power-configurable bus for embedded systems
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DAC
2008
ACM
14 years 8 months ago
Latency and bandwidth efficient communication through system customization for embedded multiprocessors
We present a cross-layer customization methodology for latency and bandwidth efficient inter-core communication in embedded multiprocessors. The methodology integrates compiler, o...
Chenjie Yu, Peter Petrov
EMSOFT
2001
Springer
13 years 12 months ago
Bus Architectures for Safety-Critical Embedded Systems
Abstract. Embedded systems for safety-critical applications often integrate multiple “functions” and must generally be fault-tolerant. These requirements lead to a need for mec...
John M. Rushby
FPL
2007
Springer
128views Hardware» more  FPL 2007»
14 years 1 months ago
Embedded Programmable Logic Core Enhancements for System Bus Interfaces
Programmable logic cores (PLCs) offer a means of providing post-fabrication re-configurability to a SoC design. Circuits implemented in a PLC will inevitably have lower timing per...
Bradley R. Quinton, Steven J. E. Wilton
DATE
2007
IEEE
90views Hardware» more  DATE 2007»
14 years 1 months ago
Bus access optimisation for FlexRay-based distributed embedded systems
FlexRay will very likely become the de-facto standard for in-vehicle communications. Its main advantage is the combination of high speed static and dynamic transmission of message...
Traian Pop, Paul Pop, Petru Eles, Zebo Peng
ASPDAC
2007
ACM
103views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Slack-based Bus Arbitration Scheme for Soft Real-time Constrained Embedded Systems
- We present a bus arbitration scheme for soft real-time constrained embedded systems. Some masters in such systems are required to complete their work for given timing constraints...
Minje Jun, Kwanhu Bang, Hyuk-Jun Lee, Naehyuck Cha...