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ISPD
2010
ACM
177views Hardware» more  ISPD 2010»
14 years 4 months ago
Skew management of NBTI impacted gated clock trees
NBTI (Negative Bias Temperature Instability) has emerged as the dominant failure mechanism for PMOS in nanometer IC designs. However, its impact on one of the most important compo...
Ashutosh Chakraborty, David Z. Pan
DATE
2009
IEEE
102views Hardware» more  DATE 2009»
14 years 4 months ago
Register placement for high-performance circuits
—In modern sub-micron design, achieving low-skew clock distributions is facing challenges for high-performance circuits. Symmetric global clock distribution and clock tree synthe...
Mei-Fang Chiang, Takumi Okamoto, Takeshi Yoshimura
TCAD
2010
116views more  TCAD 2010»
13 years 4 months ago
MeshWorks: A Comprehensive Framework for Optimized Clock Mesh Network Synthesis
Clock mesh networks are well known for their variation tolerance. But their usage is limited to high-end designs due to the significantly high resource requirements compared to clo...
Anand Rajaram, David Z. Pan
VLSID
2005
IEEE
87views VLSI» more  VLSID 2005»
14 years 10 months ago
Synthesis of Asynchronous Circuits Using Early Data Validity
Interest in asynchronous circuit design is increasing due to its promise of efficient designs. The quiescent nature of asynchronous circuits allows them to remain in a stable stat...
Nitin Gupta, Doug A. Edwards
DAC
1997
ACM
14 years 2 months ago
More Practical Bounded-Skew Clock Routing
: Academic clock routing research results has often had limited impact on industry practice, since such practical considerations as hierarchical buffering, rise-time and overshoot ...
Andrew B. Kahng, Chung-Wen Albert Tsao