420 search results - page 27 / 84 » A pseudo-hierarchical methodology for high performance micro... |
TCAD
2008
13 years 8 months ago
2008
Recently, the microprocessor industry is headed in the direction of multicore designs in order to continue the chip performance growth. We investigate buffer insertion, which is a ...
ICRA
2005
IEEE
14 years 2 months ago
2005
IEEE
— The self-propelled swimming performance of two prototypes designed to mimic the kinematics of real fish swimming at high Reynolds numbers is presented. The design methodology ...
MICRO
2009
IEEE
14 years 3 months ago
2009
IEEE
Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Large SRAM structures used for caches are particularly ...
MICRO
2000
IEEE
13 years 8 months ago
2000
IEEE
High-performance microprocessors are currently designed to exploit the inherent instruction level parallelism (ILP) available in most applications. The techniques used in their de...
DAC
2007
ACM
14 years 9 months ago
2007
ACM
The drive for low-power, high performance computation coupled with the extremely high design costs for ASIC designs, has driven a number of designers to try to create a flexible, ...