420 search results - page 7 / 84 » A pseudo-hierarchical methodology for high performance micro... |
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
The ever increasing usage of microprocessor devices is sustained by a high volume production that in turn requires a high production yield, backed by a controlled process. Fault d...
GLVLSI
2003
IEEE
14 years 22 days ago
2003
IEEE
In this paper, we present a novel hybrid multiplier architecture that has the regularity of linear array multipliers and the performance of tree multipliers and is highly scalable...
ICCAD
2002
IEEE
14 years 4 months ago
2002
IEEE
Future high performance microprocessor design with technology scaling beyond 90nm will pose two major challenges: (1) energy and power, and (2) parameter variations. Design practi...
DAC
1999
ACM
13 years 11 months ago
1999
ACM
As the family of Alpha microprocessors continues to scale into more advanced technologies with very high frequency edge rates and multiple layers of interconnect, the issue of cha...
ASPDAC
2008
ACM
13 years 9 months ago
2008
ACM
In this paper, we present a novel design methodology to combat the ever-aggravating high frequency power supply noise (di/dt) in modern microprocessors. Our methodology integrates ...