359 search results - page 26 / 72 » A section cache system designed for VLIW architectures |
IPPS
2003
IEEE
14 years 28 days ago
2003
IEEE
This paper investigates a complexity-effective technique for verifying a highly distributed directory-based cache coherence protocol. We develop a novel approach called “witnes...
DAC
2009
ACM
14 years 10 days ago
2009
ACM
Dynamic binary translation (DBT) can be used to address important issues in embedded systems. DBT systems store translated code in a software-managed code cache. Unlike general-pu...
HPCA
2008
IEEE
14 years 8 months ago
2008
IEEE
Cache partitioning and sharing is critical to the effective utilization of multicore processors. However, almost all existing studies have been evaluated by simulation that often ...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract—Addressing both standby and active power is a major challenge in developing System-on-Chip designs for batterypowered products. Powering off sections of logic or memorie...
ICS
2001
Tsinghua U.
14 years 3 days ago
2001
Tsinghua U.
The caching behavior of multimedia applications has been described as having high instruction reference locality within small loops, very large working sets, and poor data cache p...