212 search results - page 16 / 43 » A snap-on placement tool |
FPL
2007
Springer
14 years 1 months ago
2007
Springer
The programmable clock networks in FPGAs have a significant impact on overall power, area, and delay. Not only does the clock network itself dissipate a significant amount of powe...
CONEXT
2006
ACM
14 years 1 months ago
2006
ACM
Confronted with the generalization of monitoring in operational networks, researchers have proposed placement algorithms that can help ISPs deploy their monitoring infrastructure ...
TCAD
2010
13 years 2 months ago
2010
Abstract--In sub-100 nm CMOS processes, delay and leakage power reduction continue to be among the most critical design concerns. We propose to exploit the recent availability of f...
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
In a realistic design flow, circuit and system optimizations must interact with physical aspects of the design. For example, improvements in timing and power may require replacing ...
ICCAD
2010
IEEE
13 years 5 months ago
2010
IEEE
1In this paper, we will present an effective layout method for analog circuits. We consider symmetry constraint, common centroid constraint, device merging and device clustering du...