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» A statistical multiprocessor cache model
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HPCA
2003
IEEE
14 years 10 months ago
Memory System Behavior of Java-Based Middleware
Java-based middleware, and application servers in particular, are rapidly gaining importance as a new class of workload for commercial multiprocessor servers. SPEC has recognized ...
Martin Karlsson, Kevin E. Moore, Erik Hagersten, D...
ISPASS
2007
IEEE
14 years 4 months ago
PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator
In this paper, we introduce PTLsim, a cycle accurate full system x86-64 microprocessor simulator and virtual machine. PTLsim models a modern superscalar out of order x86-64 proces...
Matt T. Yourst
HPCA
2005
IEEE
14 years 10 months ago
SENSS: Security Enhancement to Symmetric Shared Memory Multiprocessors
With the increasing concern of the security on high performance multiprocessor enterprise servers, more and more effort is being invested into defending against various kinds of a...
Youtao Zhang, Lan Gao, Jun Yang 0002, Xiangyu Zhan...
IPPS
2007
IEEE
14 years 4 months ago
Performance Analysis of a Family of WHT Algorithms
This paper explores the correlation of instruction counts and cache misses to runtime performance for a large family of divide and conquer algorithms to compute the Walsh–Hadama...
Michael Andrews, Jeremy Johnson
ASPDAC
2009
ACM
110views Hardware» more  ASPDAC 2009»
14 years 4 months ago
Variability-aware robust design space exploration of chip multiprocessor architectures
Abstract— In the context of a design space exploration framework for supporting the platform-based design approach, we address the problem of robustness with respect to manufactu...
Gianluca Palermo, Cristina Silvano, Vittorio Zacca...