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» A study of slipstream processors
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ISCA
2006
IEEE
131views Hardware» more  ISCA 2006»
14 years 4 months ago
Reducing Startup Time in Co-Designed Virtual Machines
A Co-Designed Virtual Machine allows designers to implement a processor via a combination of hardware and software. Dynamic binary translation converts code written for a conventi...
Shiliang Hu, James E. Smith
ISLPED
2006
ACM
103views Hardware» more  ISLPED 2006»
14 years 4 months ago
Low power light-weight embedded systems
Light-weight embedded systems are now gaining more popularity due to the recent technological advances in fabrication that have resulted in more powerful tiny processors with grea...
Majid Sarrafzadeh, Foad Dabiri, Roozbeh Jafari, Ta...
CODES
2005
IEEE
14 years 4 months ago
Comparing the size of .NET applications with native code
Byte-code based languages are slowly becoming adopted in embedded domains because of improved security and portability. Another potential reason for their adoption is the reputati...
Roberto Costa, Erven Rohou
ISCA
2005
IEEE
166views Hardware» more  ISCA 2005»
14 years 4 months ago
Increased Scalability and Power Efficiency by Using Multiple Speed Pipelines
One of the most important problems faced by microarchitecture designers is the poor scalability of some of the current solutions with increased clock frequencies and wider pipelin...
Emil Talpes, Diana Marculescu
RTSS
2005
IEEE
14 years 3 months ago
A Deferrable Scheduling Algorithm for Real-Time Transactions Maintaining Data Freshness
Periodic update transaction model has been used to maintain freshness (or temporal validity) of real-time data. Period and deadline assignment has been the main focus in the past ...
Ming Xiong, Song Han, Kam-yiu Lam