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MICRO
2007
IEEE
168views Hardware» more  MICRO 2007»
14 years 3 months ago
Global Multi-Threaded Instruction Scheduling
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
Guilherme Ottoni, David I. August
ISCA
2003
IEEE
101views Hardware» more  ISCA 2003»
14 years 2 months ago
Overcoming the Limitations of Conventional Vector Processors
Despite their superior performance for multimedia applications, vector processors have three limitations that hinder their widespread acceptance. First, the complexity and size of...
Christoforos E. Kozyrakis, David A. Patterson
ARITH
2007
IEEE
14 years 3 months ago
Performing Advanced Bit Manipulations Efficiently in General-Purpose Processors
This paper describes a new basis for the implementation of a shifter functional unit. We present a design based on the inverse butterfly and butterfly datapath circuits that perfo...
Yedidya Hilewitz, Ruby B. Lee
ICCD
1999
IEEE
110views Hardware» more  ICCD 1999»
14 years 1 months ago
TriMedia CPU64 Architecture
We present a new VLIW core as a successor to the TriMedia TM1000. The processor is targeted for embedded use in media-processing devices like DTVs and set-top boxes. Intended as a...
Jos T. J. van Eijndhoven, Kees A. Vissers, Evert-J...
ARCS
2004
Springer
14 years 2 months ago
Modelling Cryptonite - On the Design of a Programmable High-Performance Crypto Processor
: Cryptographic algorithms – even when designed for easy implementability on general purpose architectures – still show a huge performance gap between implementations in softwa...
Rainer Buchty