563 search results - page 37 / 113 » A theory-based alternative for the design of instruction: fu... |
FPL
2006
Springer
14 years 23 days ago
2006
Springer
This paper presents a novel tool flow combining rewriting logic with hardware synthesis. It enables the automated generation of synthesizable VHDL code from mathematical equations...
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
—The sustained push for performance, transistor count, and instruction level parallelism has reached a point where chip level power density issues are at the forefront of design ...
BIRD
2007
Springer
2007
Springer
Patch Prediction of Protein Interaction Sites: Validation of a Scoring Function for an Online Server
14 years 3 months ago
An online protein interaction server has been designed and implemented to make predictions for 256 nonhomologous protein-protein interaction sites using patch analysis. Predictions...
IFIPPACT
1994
13 years 10 months ago
1994
: Advanced architectural features of microprocessors like instruction level parallelism and pipelined functional hardware units require code generation techniques beyond the scope ...
ISCAS
2007
IEEE
14 years 3 months ago
2007
IEEE
— A flexible transport stream processor for DTV which is also designed under cost-effective consideration is proposed in this paper. A RISC micro-controller is allocated as the ...