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FPGA
2005
ACM
158views FPGA» more  FPGA 2005»
14 years 1 months ago
Automated synthesis for asynchronous FPGAs
We present an automatic logic synthesis method targeted for highperformance asynchronous FPGA (AFPGA) architectures. Our method transforms sequential programs as well as high-leve...
Song Peng, David Fang, John Teifel, Rajit Manohar
DATE
2008
IEEE
142views Hardware» more  DATE 2008»
14 years 2 months ago
Approximate logic circuits for low overhead, non-intrusive concurrent error detection
This paper describes a scalable, technology-independent algorithm for the synthesis of approximate logic circuits. A low overhead, non-intrusive solution for concurrent error dete...
Mihir R. Choudhury, Kartik Mohanram
AICCSA
2007
IEEE
84views Hardware» more  AICCSA 2007»
14 years 1 months ago
Encoding Algorithms for Logic Synthesis
This paper presents an encoding algorithm that is very efficient for many different logic synthesis problems. The algorithm is based on the use of special tables and includes two ...
Valery Sklyarov, Iouliia Skliarova
DKE
2008
103views more  DKE 2008»
13 years 7 months ago
The XML Tree Model - toward an XML conceptual schema reversed from XML Schema Definition
XML Schema Definition (XSD) is the logical schemas of an XML model, but there is no standard format for the conceptual schema of an XML model. Therefore, we propose an XML Tree Mo...
Joseph Fong, San Kuen Cheung, Herbert Shiu
DDECS
2006
IEEE
79views Hardware» more  DDECS 2006»
14 years 1 months ago
Multiple-Vector Column-Matching BIST Design Method
- Extension of a BIST design algorithm is proposed in this paper. The method is based on a synthesis of a combinational block - the decoder, transforming pseudo-random code words i...
Petr Fiser, Hana Kubatova