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DSN
2002
IEEE
14 years 9 days ago
Detecting Processor Hardware Faults by Means of Automatically Generated Virtual Duplex Systems
A virtual duplex system (VDS) can be used to increase safety without the use of structural redundancy on a single machine. If a deterministic program P is calculating a given func...
Markus Jochim
ICCAD
2003
IEEE
127views Hardware» more  ICCAD 2003»
14 years 4 months ago
Code Placement with Selective Cache Activity Minimization for Embedded Real-time Software Design
– Many embedded system designs usually impose (hard) read-time constraints on tasks. Thus, computing a tight upper bound of the worst case execution time (WCET) of a software is ...
Junhyung Um, Taewhan Kim
DATE
2004
IEEE
136views Hardware» more  DATE 2004»
13 years 11 months ago
An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems
Recently a lot of multimedia applications are emerging on portable appliances. They require both the flexibility of upgradeable devices (traditionally software based) and a powerf...
Michele Borgatti, Andrea Capello, Umberto Rossi, J...
TCAD
2008
114views more  TCAD 2008»
13 years 7 months ago
Word-Level Predicate-Abstraction and Refinement Techniques for Verifying RTL Verilog
el Predicate Abstraction and Refinement Techniques for Verifying RTL Verilog Himanshu Jain, Daniel Kroening, Natasha Sharygina, and Edmund M. Clarke, Fellow, IEEE As a first step, ...
Himanshu Jain, Daniel Kroening, Natasha Sharygina,...
ICCAD
2003
IEEE
154views Hardware» more  ICCAD 2003»
14 years 4 months ago
Fast, Accurate Static Analysis for Fixed-Point Finite-Precision Effects in DSP Designs
Translating digital signal processing (DSP) software into its finite-precision hardware implementation is often a timeconsuming task. We describe a new static analysis technique ...
Claire Fang Fang, Rob A. Rutenbar, Tsuhan Chen