29 search results - page 4 / 6 » Accurate Area and Delay Estimators for FPGAs |
DAC
2003
ACM
14 years 8 months ago
2003
ACM
This paper considers the role of performance and area estimates from behavioral synthesis in design space exploration. We have developed a compilation system that automatically ma...
ISSS
1995
IEEE
13 years 11 months ago
1995
IEEE
We present an integrated approach aimed at predicting layout area needed to implement a behavioral description for a given performance goal. Our approach is novel because: (1) it ...
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
It has been widely recognized that the dynamic range information of an application can be exploited to reduce the datapath bitwidth of either processors or ASICs, and therefore th...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
Traditional RTL power optimization techniques commit transformations at the RTL based on the estimation of area, delay and power. However, because of inadequate power and delay in...
CDC
2009
IEEE
14 years 10 days ago
2009
IEEE
Abstract— The accurate estimation of airport capacity is critical for the efficient planning of landing and takeoff operations, and the mitigation of congestion-induced delays. ...