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TVLSI
2010
13 years 5 months ago
Accurate Predictive Interconnect Modeling for System-Level Design
Luca P. Carloni, Andrew B. Kahng, Sudhakar Muddu, ...
TC
1998
13 years 10 months ago
Using System-Level Models to Evaluate I/O Subsystem Designs
—We describe a system-level simulation model and show that it enables accurate predictions of both I/O subsystem and overall system performance. In contrast, the conventional app...
Gregory R. Ganger, Yale N. Patt
CODES
2009
IEEE
14 years 2 months ago
Cycle count accurate memory modeling in system level design
In this paper, we propose an effective automatic generation approach for a Cycle-Count Accurate Memory Model (CCAMM) from the Clocked Finite State Machine (CFSM) of the Cycle Accu...
Yi-Len Lo, Mao Lin Li, Ren-Song Tsay
ICCAD
2004
IEEE
88views Hardware» more  ICCAD 2004»
14 years 7 months ago
Interconnect lifetime prediction under dynamic stress for reliability-aware design
Thermal effects are becoming a limiting factor in highperformance circuit design due to the strong temperaturedependence of leakage power, circuit performance, IC package cost and...
Zhijian Lu, Wei Huang, John Lach, Mircea R. Stan, ...
3DIC
2009
IEEE
146views Hardware» more  3DIC 2009»
14 years 5 months ago
A routerless system level interconnection network for 3D integrated systems
- This paper describes a new architectural paradigm for fully connected, single-hop system level interconnection networks. The architecture is scalable enough to meet the needs of ...
Kelli Ireland, Donald M. Chiarulli, Steven P. Levi...