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DDECS
2007
IEEE
105views Hardware» more  DDECS 2007»
15 years 10 months ago
A Heuristic for Concurrent SOC Test Scheduling with Compression and Sharing
1-The increasing cost for System-on-Chip (SOC) testing is mainly due to the huge test data volumes that lead to long test application time and require large automatic test equipmen...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...
GLVLSI
2005
IEEE
118views VLSI» more  GLVLSI 2005»
15 years 9 months ago
High-diagnosability online built-in self-test of FPGAs via iterative bootstrapping
We develop a novel on-line built-in self-test (BIST) technique for testing FPGAs that has a very high diagnosability even in presence of clustered faults, a fault pattern for whic...
Vishal Suthar, Shantanu Dutt
DATE
2010
IEEE
139views Hardware» more  DATE 2010»
15 years 9 months ago
Constant-time admission control for Deadline Monotonic tasks
—The admission control problem is concerned with determining whether a new task may be accepted by a system consisting of a set of running tasks, such that the already admitted a...
Alejandro Masrur, Samarjit Chakraborty, Georg F&au...
ET
2010
122views more  ET 2010»
15 years 1 months ago
Fault Models for Quantum Mechanical Switching Networks
This work justifies several quantum gate level fault models and discusses the causal error mechanisms thwarting correct function. A quantum adaptation of the classical test set gen...
Jacob D. Biamonte, Jeff S. Allen, Marek A. Perkows...
ICALT
2008
IEEE
15 years 10 months ago
An Intelligent Engine for the Generation of Adaptive Tutorials
The goal of this work is the design and construction of adaptive tutorials based on the application of algorithms for the automatic resolution of problems which can be used to aut...
Tomás Álvarez, Carmen Escribano, Dan...