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EUROPAR
2009
Springer
15 years 10 months ago
High Performance Matrix Multiplication on Many Cores
Moore’s Law suggests that the number of processing cores on a single chip increases exponentially. The future performance increases will be mainly extracted from thread-level par...
Nan Yuan, Yongbin Zhou, Guangming Tan, Junchao Zha...
ISPD
1997
ACM
100views Hardware» more  ISPD 1997»
15 years 8 months ago
A pseudo-hierarchical methodology for high performance microprocessor design
- This paper reports on a highly effective methodology to construct complex high performance microprocessors. Critical aspects of the methodology include an integrated database for...
A. Bertolet, K. Carpenter, Keith M. Carrig, Albert...
ISLPED
2003
ACM
100views Hardware» more  ISLPED 2003»
15 years 9 months ago
Checkpointing alternatives for high performance, power-aware processors
High performance processors use checkpointing to rapidly recover from branch mispredictions and possibly other exceptions. We demonstrate that conventional checkpointing becomes u...
Andreas Moshovos
ICDCS
2007
IEEE
15 years 10 months ago
Distributed Resource Management and Admission Control of Stream Processing Systems with Max Utility
A fundamental problem in a large scale decentralized stream processing system is how to best utilize the available resources and admission control the bursty and high volume input...
Cathy H. Xia, Donald F. Towsley, Chun Zhang
171
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SIGGRAPH
1996
ACM
15 years 8 months ago
Simulating Facial Surgery Using Finite Element Models
This paper describes a prototype system for surgical planning and prediction of human facial shape after craniofacial and maxillofacial surgery for patients with facial deformitie...
Rolf M. Koch, Markus H. Gross, Friedrich R. Carls,...