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» Advanced techniques for RTL debugging
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DAC
2003
ACM
14 years 4 months ago
Advanced techniques for RTL debugging
Conventional register transfer level (RTL) debugging is based on overlaying simulation results on structural connectivity information of the Hardware Description Language (HDL) so...
Yu-Chin Hsu, Bassam Tabbara, Yirng-An Chen, Fur-Sh...
VLSID
2008
IEEE
128views VLSI» more  VLSID 2008»
14 years 11 months ago
Addressing the Challenges of Synchronization/Communication and Debugging Support in Hardware/Software Cosimulation
With increasing adoption of Electronic System Level (ESL) tools, effective design and validation time has reduced to a considerable extent. Cosimulation is found to be a principal...
Banit Agrawal, Timothy Sherwood, Chulho Shin, Simo...
VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
14 years 4 months ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil
FDL
2007
IEEE
14 years 5 months ago
An Integrated SystemC Debugging Environment
Since its first release the system level language SystemC had a significant impact on various areas in VLSI-CAD. One remarkable benefit of SystemC lies in the of abstraction le...
Frank Rogin, Christian Genz, Rolf Drechsler, Steff...
DAC
2006
ACM
14 years 4 months ago
Visibility enhancement for silicon debug
Several emerging Design-for-Debug (DFD) methodologies are addressing silicon debug by making internal signal values and other data observable. Most of these methodologies require ...
Yu-Chin Hsu, Fur-Shing Tsai, Wells Jong, Ying-Tsai...